IEEE

FPGA Implementation of PoolFormer Network Using Python-Driven High-Level Synthesis Framework for Edge-AIoT Speech Recognition

Abstract: This brief presents an edge-AIoT speech recognition system, which is based on a new spiking feature extraction (SFE) method and a PoolFormer (PF) neural network optimized for implementation ...
IEEE

SPECK Algorithm Implementation in VLSI: A Verilog-Based Approach for Efficient Simulation, Synthesis and Cryptographic Enhancement

Abstract: Cryptography plays a key role in ensuring data security in resources, such as IoT devices, built -in systems and wireless sensor networks. Speck algorithm is a light encryption block ...